1. Field of the Invention
This invention relates to a row electrode driving circuit for a display apparatus, and more particularly to a row electrode driving circuit for a matrix type display apparatus.
2. Description of the Prior Art
As a typical example of a matrix type display device, a matrix type liquid crystal display (LCD) apparatus is shown in FIG. 6. The LCD apparatus of FIG. 6 comprises an LCD panel 61 having: a plurality of row electrodes 61a which are disposed on a substrate parallel to one another; and a plurality of column electrodes 61b which intersect the row electrodes 61a. A pair of a picture element (pixel) electrode 61c and a thin film transistor (TFT) 61d which functions as a switching element is disposed at each crossing of the row electrodes 61a and the column electrodes 61b. The LCD panel 61 is driven by a row electrode driving circuit 62 and column electrode driving circuit 63. The row electrode driving circuit 62 produces scanning pulses which are in turn supplied to the row electrodes 61a to sequentially turn on each row of the switching transistors 61d. The column electrode driving circuit 63 produces voltage signals which are applied to the pixel electrodes 61c through the column electrodes 61b. A control circuit 64 controls the operations of the row electrode driving circuit 62 and the column electrode driving circuit 63.
As shown in FIG. 7, the row electrode driving circuit 62 comprises a shift register circuit 71, a level shifter circuit 72, and a buffer circuit 73. The shift register circuit 71 shifts a pulse signal D in accordance with clock pulses .phi. and sequentially outputs the pulse signal to lines q.sub.1, q.sub.2, . . . , q.sub.n. The level shifter circuit 72 converts the pulse signal output to the lines q.sub.1, q.sub.2, . . . , q.sub.n into voltage levels required for turning on and off the switching transistors 61d. The buffer circuit 73 outputs voltage signals Q.sub.1, Q.sub.2, . . . , Q.sub.n converted by level shifter circuit 72.
The operation of the row electrode driving circuit 62 will be described with reference to FIG. 8. After the input of the pulse signal D, pulse signals are sequentially output to the lines q.sub.1, q.sub.2, . . . , q.sub.n from the shift register circuit 71. The voltage signals Q.sub.1, Q.sub.2, . . . , Q.sub.n converted by level shifter circuit 72 are output through the buffer circuit 73, based on this pulse signal.
If the number of the row electrodes 61a to be driven is large, the row electrode driving circuit 62 is usually comprised of a plurality of partial row electrode driving circuits 90a (LSI1), 90b (LSI2), 90c (LSI3), . . . , each corresponding to a portion of the row electrodes 61a and integrated in one LSI chip, as shown in FIG. 9. The partial row electrode driving circuits 90a, 90b, 90c, . . . comprise shift register circuits 91a, 91b, 91c, . . . (hereinafter, simply indicated by "91"), level shifter circuits 92a, 92b, 92c, . . . (hereinafter, simply indicated by "92"), and buffer circuits 93a, 93b, 93c, . . . (hereinafter, simply indicated by "93"), respectively. The shift register circuit 91, level shifter circuit 92 and buffer circuit 93 may have the same structure as the shift register circuit 71, level shifter circuit 72 and buffer circuit 73 shown in FIG. 7, respectively, except that the number of row electrodes to drive is different. It is necessary for the shift register circuits 91a, 91b, 91c, . . . in all of the partial row electrode driving circuits 90, as a whole, to continuously operate as a single shift register circuit. Therefore, for example, the output of the final step of the shift register circuit 91a in the partial row electrode driving circuit 90a is supplied to the shift register circuit 91b in the next partial row electrode driving circuit 90b.
In the above-mentioned row electrode driving circuit 62, digital signals and analog signals mixedly exist, and therefore noises from the digital signals which are mixed with the analog signals become a problem. When such a row electrode driving circuit 62 is applied to a display apparatus in a small sized television display device, in addition to a direct effect via power lines and signal lines, there occurs such an indirect effect that high frequency noises radiated into the air are picked up by an antenna of the device, causing disturbance in the displayed image. Furthermore, at the instant when the level of the digital signals changes, currents of a comparatively large amount flow, and as a result, a linear disturbance synchronized with the change in the digital signal level is generated on the display of the display apparatus. In a row electrode driving circuit as shown in FIG. 9 wherein a plurality of partial row electrode driving circuits (LSIs) are connected in a cascade, the level of digital signals transmitted between the LSIs changes during an image display period, thereby causing the image disturbance. Furthermore, since LSIs are usually mounted in a high density, there are many cases where it is impossible to carry out effective noise countermeasures in the vicinity of the LSIs.